Circuit developers typically utilize a “design flow” to develop circuit designs representing electronic devices. The particular steps of the design flow often are dependent upon a type of electronic device to be manufactured, its complexity, the design team, and a fabricator or foundry that will manufacture integrated circuits implementing the electronic device. Typically, these circuit developers utilize software and hardware “tools” to help develop and verify the circuit design at various stages of the design flow. The circuit design at the end of the design stage is often specified as a layout design, for example, in a Graphic Database System II (GSDII) format or Open Artwork System Interchange Standard (OASIS) format.
Manufacturing of the integrated circuits based on the layout design can include several different phases, such as wafer fabrication, in-circuit testing, die cutting, wire bonding, device packaging, burn-in testing, device binning, and device marking, which can produce integrated circuit chips implementing the electronic device described in the circuit design. Since many circuit developers utilize third-party fabricators or foundries to manufacture integrated circuit chips, the lack of direct control over the manufacturing of the chips can lead to various manufacturing-related vulnerabilities, such as unauthorized (over)production and/or distribution of chips fabricated based on the layout designs, or the like.
Some circuit developers have attempted to combat these manufacturing-related vulnerabilities by initially locking or disabling manufactured integrated circuit chips, and providing an unlocking code or key to consumers having purchased the manufactured integrated circuit chips. Since part of the manufacturing process tests the integrated circuit chips while they are enabled, such as during the in-circuit testing and the burn-in testing, in order to perform this testing, the circuit developers would have to provide the unlocking code or key to the third-party fabricators or foundries.